From 1461504ce3c414fc5dc717ce16f039d0742b455a Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Fri, 2 Sep 2016 08:12:29 +0200 Subject: [PATCH] x86/levelling: fix breakage on older Intel boxes from c/s 08e7738 cpufeat_mask() yields an unsigned integer constant. As a result, taking its complement causes zero extention rather than sign extention. The result is that, when a guest OS has OXSAVE disabled, all features in 1d are hidden from native CPUID. Amongst other things, this causes the early code in Linux to find no LAPIC, but for everything to appear fine later when userspace is up and running. Signed-off-by: Andrew Cooper Tested-by: Jan Beulich --- xen/arch/x86/cpu/intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index a9355cbfa1..7b60aaa6fc 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -192,7 +192,7 @@ static void intel_ctxt_switch_levelling(const struct vcpu *next) */ if (next && is_pv_vcpu(next) && !is_idle_vcpu(next) && !(next->arch.pv_vcpu.ctrlreg[4] & X86_CR4_OSXSAVE)) - val &= ~cpufeat_mask(X86_FEATURE_OSXSAVE); + val &= ~(uint64_t)cpufeat_mask(X86_FEATURE_OSXSAVE); if (unlikely(these_masks->_1cd != val)) { wrmsrl(msr_basic, val); -- 2.30.2